Electron-beam lithography has been used to form a contact hole layer of a semiconductor device in which other layers are formed by light lithography. It has also been proposed (e.g., in IEEE ELECTRON DEVICE LETTERS, VOL. EDL-2, NO. 11, NOVEMBER 1981) to use light exposure and electron-beam exposure to expose respective portions of the same resist layer in the fabrication of a semiconductor device.
Using electron-beam lithography and light lithography for separate layers of a semiconductor device presents no particular difficulties. Problems can arise, however, when a light exposure and an electron-beam exposure are used within a single resist layer to form respective portions of a pattern in that layer. In particular, where a connection is required between a pattern element to be defined by light exposure and pattern element to be defined by electron-beam exposure, breaks in the pattern can occur at the connection region.
The present invention allows the use of both the high resolution of electron-beam exposure and the high throughput of light exposure in the same resist layer, while providing pattern-formation methods that minimize the occurrence of pattern breaks.